Many links are from John's electronic links page.
Dick suspects the AMU/ADC operation. Therefore I collected some info on them:
From 
   Timing and Control Requirements for a 32-Channel AMU-ADC...
          ADC    AMU write    w/correlator
    ----------------------------------------------------------------
        raddr4       -        raddr4
        raddr5       -        raddr5
        amprst       -        amprst
        rena         -        rena         read enable
        az           -        az           auto-zero
        cmprst       -        cmprst       
        dbrst        -        dbrst
        ics          -        ics          internal comparator switch
        clken        -        clken
        fsc          -        fsc
        load         -        load
        addr         -         -
        addr         -         -
        addr         -         -
        addr3        -         -
        addr4        -         -
          -         wen        -           write enable 
          -         waddr0     -
          -         waddr1     -
          -         waddr2     -
          -         waddr3     -
          -         waddr4     -
          -         waddr5     -
          -         raddr0    raddr0
          -           -       raddr1
          -           -       raddr2
          -           -       raddr3
          -           -       conn      (dis)connect the difference amp
        ----------------------------------------------------------
These are some measurements taken on the PC-MCM:
Some key control signals for the ADCs
  Scope traces of key output signals from AMU/ADC chips
II - Feedback
Pat suspects feedback, possibly from the MCM surface mounts to the Kapton cable. Note the pads don't have a Kapton cable.
Here are noise measurements from John
     test                          what it checks
   ---------------------------------------------------------------------
   all channels disabled           test feedback from MCM to kapton cable
   compare IB to OT packets        test feedback, shortest to longest kapton
   correlator off                  is trouble at lower/upper end of range?
   amu/adc settings                setup OK?  
   reload MCM before calib         tests if slow drift is due to losing a 
                                   digital clock tick, getting out of phase
   for a given packet, how many different AMU patterns are there? 4 or infinite?
   show same packet, different calibs
 
   can we see this on the bench?
   
   amu spy line available for bench testing?
   get the timing diagram  of all control lines to AMU/ADC
   old pictures of this on the bench to confirm that this is new 
   temp data bench vs now on the MCM
   what were conditions for SangSu's  amu picture
     - real data - 
     - corr on/off
     - AMU cell gap for pre/post sample (1 or 2) 
     - offset (440 ch) from where?
     - clocks to the AMU (2 pecl+ttl)
missing : got a dcim in 1008/ 510 cheezy etc does not work right now.