Quality Assurance Test Results of the Pre-production Mother Board


YoungGook Kim

Yonsei University, Korea

Sangkoo Hahn, Hubert van Hecke, John Sullivan

Los Alamos National Laboratory

This is an updeted version of note 98-28, July, 1998


Introduction

Mother Boards, which are mounted in each end cap region of the MVD, link the inside of the MVD to the outside world. There are four Mother Boards for the MVD, a left and right type at each south and north end. These are the only gates to communicate with the inside of the MVD. The LVDS data, the discriminator sums which form LVL-1, and various monitoring signals come out through the Mother Board. In the meantime, the regulated powers for front-end electronics , Silicon Bias and control signals including timing control and slow serial control for the MCMs, enter through the Mother Board. Details can be found elsewhere [1, 2].

Following the test plan[1], we have tested the integrity of the Mother Board(right-side version) as well as the different functions. This note will describe the setup for each test and summarize test results.


  1. The connectivity test

  2. The LDO voltage regulator test

  3. The analog spy test

  4. The multiplexed serial readout of the various monitoring voltages
    and the update on the ADC response

  5. The PECL clock test

  6. Conclusion


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