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Data Collection Module Interface Module test


In the DCMIM (Data Collection Module Interface Module) test we will use three cheesy cards, which are PCL-720 digital input/output cards. The signals of the A and C cards are generated by the PC, and card B will be read by the PC. In this test we also need G-link receivers which sit on the generic test board that will be made at Oak Ridge.

As you can see in the picture below, cheesy card A generates the digital signal for the FPGA chips, which means we download the bits file to the Xilinx chips in the test board and in the DCMIM.

Cheesy card B reads the output data from the DCMIM. The data from the DCMIM is transferred through the G-link, thus we need a G-link receiver between the DCMIM and the cheesy card. In addition a FIFO memory will be inserted between the G-link receiver and cheesy card in order to allow the slow PC to catch up with the real data processing speed. This FIFO also sits on the test board.

Cheesy card C is used to input data such as timing and control, end of data, and serial data to the DCMIM. This card also needs a FIFO in order to solve the speed problem.