Ramp setup on the PC/MCM

The RAMP (RAMP_OUT = pin 94 = pad 21) on the AMU/ADC's is adjusted with the iref and Vref DACs. The ADC works by comparing the ramp to the voltage being digitized. During this period, the ADC counter counts. When the RAMP and the voltage being digitized are equal, the counter stops. iref is used to adjust the slope of the ramp. Vref is the starting voltage for the ramp. The ramp continues for a period of time which depends on the number of bits being digitized.

The first example shows the ramp with the ADCs set for 10 bit digitization. The 4X beam clock was 40MHz for this test. The test used the "Bench calibration" mode. This should not affect the shape of the ramp, but the scope is triggered on Mode bit 0, which initiates the bench calibration procedure. This trace is shown on the bottom. The other traces show various iref and Vref settings. A careful observer will notice that the length of the RAMP is too short for 10 bit digitization. The ramp should be 12.8 microseconds long (or slightly more). It actually seems to be 12 microseconds wide. The system seems to time out at about 120 beam clocks (12 microsec), rather than 200 beam clocks (20 microsec) as it should. Why it does this is an unresolved problem. It times out at the correct (200) number of beam clocks when we use a slower clock. The picture below is also available as a postscript file.

The following picture shows the same set of iref and Vref DAC settings for 9 bit digitization. Notice that ramp is shorter (about 6.4 microsec). The picture below is also available as a postscript file.

John Sullivan
updated 3-Mar-1999