SOI Detector and 3D integrated Circuit Development for HEP
 
Fermilab has been looking at alternatives to the standard Monolithic Active Pixel Sensors (MAPS) being development by many other groups.  One of our efforts is to develop integrated sensors and readout electronics in SOI processes where the substrate beneath the buried oxide (BOX) is used to form sensing diodes.  Fermilab has submitted one chip to the OKI foundry in Japan and is working on another design with American Semiconductor Inc.  The second effort is to implement vertical scale integration (3D) which stacks several thinned devices on top of each other to provide high functionality in a minimal mass structure.  Fermilab has submitted one 3D chip based on ILC vertex requirements to MIT Lincoln Labs.  The work done with OKI, ASI, and MIT LL will be discussed.