An overview of the development and characterization of HV-CMOS active pixel sensors for the ATLAS ITk upgrade and for the future CLIC vertex detector. The HV-CMOS technology allows the production of monolithic detectors (MAPs) capable of sustaining high voltages (above 100V), necessary for the sensor depletion and fast charge collection, not possible on the current technology used on MAPs. In addition, hybrid Capacitively Coupled Pixel Detectors (CCPDs) is also possible with HV-CMOS sensors, allowing the sensor to be capacitively coupled to a readout ASIC by a glue layer, avoiding the expensive bump-bonds. An extensive work is done in the characterization of this new sensor technology in order to evaluate its usage in the ATLAS and CLIC future detectors. TCAD simulations of the HV-CMOS pixel designs and TCT measurements on real devices will be shown. In addition, automatized wafer probing measurements and the detector flip-chip, of the sensors with the readout chips, will be presented, followed by an introduction to the FPGA-based readout system developed. Laboratory measurements, such as DAC scans and test-pulse calibration/tuning, will be discussed. To conclude, test beam measurements done at CERN SPS and at Fermilab, using the UniGE FE-I4 Telescope, will be shown with results of different prototypes, produced with different technology node size of 180nm and 350nm, before and after irradiation, will be shown and discussed.