/* dMvdFEM.idl */ /* Organization of data output from the MVD DCM/IMs */ /* I have borrowed from the organization and naming */ /* conventions used in the Dch software */ /* For some MVD-related details, see Phenix Note 342 */ /* by Nance Ericson */ /* J.P. Sullivan 30-Jun-98 */ /* J.P. Sullivan revised 24-Jul-98 */ struct dMvdFEM { short CAV1; /* all bits on */ short det; /* following Phenix naming covention, */ /* contains "2" for MVD in upper 8 bits */ short Ecounter; /* LVL1 accepted event number */ short adr; /* module address, the lower 2 bits are */ /* the "PLEX" bits and the rest are used */ /* to identify the MCM number */ short Flag; /* bit 0 = zero suppression */ /* bit 1 = 0 = correlator on (normal) */ /* = 1 = correlation off (a.k.a. raw*/ /* mode = for calibrations) */ short Bcounter; /* FEM beam clock counter (8 bits) */ short amucells; /* AMU cells (low/high bytes) */ short adc[256]; /* ADC data (256 10 bit words) */ short user[8]; /* user words, used to contain various */ /* error codes */ /* positions of the words containing data */ /* parity errors are stored in the first */ /* 7 words, the 8th word contains framing */ /* error identifiers */ /* underflow (not enough words) - bit 11 */ /* overflow (too many words ) - bit 12 */ /* two start bits without a stop- bit 13 */ short parity; /* checksum -- a.k.a. vertical checksum */ /* -- a.k.a. longitudinal parity word */ short CAV2; /* end of transmission (00000000) */ };