The signal from each silicon strip (or pad) reaches the preamp/integrator via a Kapton cable (max lenght 19 cm). The integrator signal is sampled every beam crossing, and the analog voltage is stored in an analog memory. The Address List Manager FPGA (ALM) keeps track of the sample addresses and addresses available for writing. If a signal occurred at a particular crossing, it would show up as a difference in the voltages stored just before and just after the beam crossing. If a trigger is received, the Heap Manager instructs the ALM to retrieve the right pair of samples, which are then subtracted from each other, yielding the signal. This is passed on to the ADC for digitization. The 256 values are collected by the FPGA, packaged up with event headers and trailers, and sent off. The Heap Manager is configured via serial lines.