Description of a program to change the serial string

Description of a program to set the serial string for the MVD MCMs

I wrote a program (call serial2) which can read in an arcnet formatted file of MCM serial string bits (sample file here), read a series of commands to change some of the parameters, then write a new file when you exit (command to exit is exit or quit). You can get a copy of the program either by downloading this "tar" file if that is useful to you, or else by downloading everything in everything in this directory. If you take the tar file, "untar" it with
tar -xvf changes.tar
Build the program with
make serial2

You can find a brief description of the serial string and some suggested settings for the various parameters here. You can find a description of the order the serial string bits get sent here -- this link also contains additional links to some old tests of the serial string bits (i.e. do they do whhat they should?). Those tests are old -- more things have been tested since then. Also notice that those old notes count bits starting from 1 while the bits are numbered starting at 0 here.

When you first start the program, it may be helpful to use the "status" command. It shows the settings of the serial string bits in the input file.

The latest version of the program also writes an output file called response.rsp which is in the correct format to be compared to the data returned by the arcnet command to read back the serial string.

I wrote a script which attempts to setup a complete set of files to be used in the arcnet commands to download and then read-back the serial string. Here is the first version of that script. It is not a very clever script. The channels which must be turned off are given on this web page.

Here is the sequence of commands I use to setup the serial string files.

On phenix14, in mvdonl account in /usr1/mvdonl/serial/change_serial directory:

setup_serial_run
tar -cvf serial_run_12jul01.tar serial_run_12jul01/

On phoncs0, in /export/software/oncs/online_configuration/Arcnet/mvd/hex directory:

scp mvdonl@phenix14:/usr1/mvdonl/serial/change_serial/serial_run_12jul01.tar .
tar -xvf serial_run_12jul.tar
setup_serial_run_19jul
cd ../acf
$ARCNET_BIN/arcnet_client mvd_mcm_serial_run_19jul.acf (0/174 errors)

$ARCNET_BIN/arcnet_client mvd_mcm_serial_run_19jul.acf (6/81 errors)

Currently, the readback gives 6, apparently real, errors:

mcm0_read_serial_4_5n.hex (NW IM6) -- this MCM works.
mcm1_read_serial_3_1n.hex (NW IB2) -- this MCM does not work.
mcm1_read_serial_4_1n.hex (NW OB2) -- this MCM does not work.
mcm1_read_serial_4_4n.hex (NW OB5) -- this MCM does not work.
mcm1_read_serial_3_3n.hex (NW IB4) -- this MCM works.
mcm3_read_serial_3_2n.hex (NW pad 3) -- this MCM works.

We plan to modify the relevant response files to show whatever these normally respond with. This is done in order to give "zero errors" as the normal readback value, which allows us to test this condition at startup.

Look here for powerpoint and ppt plots showing the current connections on the two arcnet interface module front pages.

General commands:

command purpose
status prints a table summarizing the current settings of the serial string bits.
help Does not give much in the way of instructions, but does give the url of this web page.

Commands related to the heap manager part of the serial string:

command bits used purpose
hm lvl1 Ndelay hmbit[0-3] adjusts the assumed level-1 delay to Ndelay beam clock ticks (from 33 to 47)
-- hmbit[4] not used
hm prepost bitval hmbit[5] sets the separation between pre and post samples (in the amu cells) to either 1 (bitval=0) or 2 (bitval=1) beam clock ticks.
hm phase iphase hmbit[6-7] level-1 phase adjust (1/4 beam clock units) iphase ranges from 0 to 3. Change is -iphase*(1/4).
hm test itest hmbit[8] when itest is 1, all data packets contain data values of 1, 2, 3, ... Setting it to zero (normal running) turns this test mode off.
hm ren onoff hmbit[9] onoff=1 means enable internal preamp resets. In normal running, this should be zero -- the preamp resets come from the externally driven mode bits.
-- hmbit[10-11] these bits are used to set the number of bits used to digitize the ADCs. Because the MVD does not expect to ever use anything but 10 bits, no command was written to change these bits. They should always be hmbit[10]=1, [11]=0.
hm raw onoff hmbit[12] onoff=1 Set "raw" mode (2 packets per event), =0 correlator mode, normal running setting This command also sets the related amu serial string to the correct values.
hm calen onoff hmbit[13] Normally this bit is 0. When set to 1, the calibration mode is enabled.
hm renfreq ifreq hmbit[14-15] ifreq is from 0 to 3, controls internal preamp reset frequency if iren=1. =0 means highest reset frequency, =3 means lowest reset frequency

AMU/ADC commands.

All of these commands start with
amu "command" ichip arg[s]
where "command" and "arg[s]" vary from one command to the next. ichip is the "chip" number on the MCM. ichip ranges from 1-8 (not 0-7) in this command because 0 is reserved to mean "set the same value for all 8 chips". The "ichip=0" option is not allowed for the "mux" commands because you should never turn more than one of these on at a time.

The html file below may format the command on more than one line, but the commands should be a single line when you type them.

command bits used purpose
amu amumux ichip onoff chan amubit[ichip-1][0], amubit[ichip-1][25], amubit[ichip-1][1-5] Turn on a single AMU spy channel output This means setting amubit[ichip-1][0] and amubit[ichip-1][25] to 1 (onoff value) to enable output for the selected channel or to 0 (onoff value) to turn it off. chan is the channel number (from 0 to 31) which is used to set bits 1-5. Note, only 1 AMU spy channel should be on at one time, so this command turns all other channels off.
-- amubit[ichip-1][6] correlator enable bit. This should have a value opposite to the heap manager's raw mode bit and therefore it is set via the heap manager command -- not here
amu vref ichip Volts amubit[ichip-1][7-12] max voltage in digitization "ramp". Vref ranges from 0.2Volts to 4.8Volts.
amu vcorr ichip Volts amubit[ichip-1][13-18] Set vcorr DAC. Vcor ranges from 0.1Volts to 2.5Volts.
amu iref ichip microamps amubit[ichip-1][19-24] Sets slope of ramp. Iref ranges from 2 to 70 microamps.
amu tgvmux ichip onoff chan amubit[ichip-1][26], amubit[ichip-1][27], amubit[ichip-1][28-32] Turn on a single Preamp spy chan output This means setting amubit[ichip-1][26] and amubit[ichip-1][27] to 1 (onoff value) to enable output for the selected channel or to 0 (on off value) to turn it off. "chan" is the channel number (from 0 to 31) which is used to set bits 28-32. Note, only 1 preamp spy chan should be on at one time, so this command turns all other channels off.

TGV's:

All of these commands start with
tgv "command" ichip arg[s]
where "command" and "arg[s]" vary from one command to the next. ichip is the "chip" number on the MCM. ichip ranges from 1-8 (not 0-7) in this command because 0 is reserved to mean "set the same value for all 8 chips".

The html file below may format the command on more than one line, but the commands should be a single line when you type them.

command bits used purpose
tgv csdis ichip chan onoff tgvbit[ichip-1][1-32] current sum (aka discriminator) disable, 1 means disable. chan = 0 means all channels on a chip, chan = 1-32 means a single channel. onoff=0 is on (normal), 1 is disable.
tgv dtwk ichip chan ithr tgvbit[ichip-1][32-95] Discriminator tweak bits. ithr ranges from 0 to 3 in the command. These bits are intended to provide a fine channel to channel adjust for the coarse threshold set for all 32 channels on a chip via the Vthr DAC.
tgv predis ichip chan onoff tgvbit[ichip-1][96-127] Preamp disable , 1 means disable chan = 0 means all channels on a chip, chan = 1-32 means a single channel onoff=0 is on (normal), 1 is disable
tgv predisc chan onoff tgvbit[0..7][96-127] Preamp disable, similar to predis, but count channels from 0-255 and leave chip number out of the command. chan = 0-255, onoff=0 is on (normal), 1 is disable.
tgv calen ichip chan onoff tgvbit[ichip-1][128-159] Bench cal eneable, 1 means on. chan = 0 means all channels on a chip, chan = 1-32 means a single channel onoff=0 is off, =1 is on
tgv vthr ichip Volts tgvbit[ichip-1][160-165] Set the VTHR DAC -- sets threshold on discriminator. This adjustment's sensitivitiy is controlled by Vgate. A lower setting means higher threshold Vthr=0 is the highest threshold. 1 mip seems to be around 1.4V. It ranges from 0.00 to 1.86V.
tgv vmid chip volts tgvbit[ichip-1][166-171] Set the Vmid DAC (I'm not real clear about this DAC. It sets an offset V, but I forgot on what.) It ranges from 1.71 to 4.50V.
tgv vgate ichip Volts tgvbit[ichip-1][172-177] Set the Vgate DAC (I'm not real clear about this DAC, but it is related to the discriminator performance -- it controls the sensitivity of the threshold to the THRESH_DAC). It ranges from 0.006 to 3.68V.
tgv vfb ichip Volts tgvbit[ichip-1][178-183] Set the Vfb DAC (baseline restoration). It ranges from 0.006 to 5.02V. Around 3.0V seems to work best, higher number means return to baseline slower.
tgv vcal ichip Volts tgvbit[ichip-1][184-189] Set the Vcal DAC (for bench cal pulse). It ranges from 3.48 to 5.0V. 3.48 corresponds to the biggest pulse

John Sullivan
updated 18-Dec-2002

command	purpose
status	prints a table summarizing the current settings of the serial string bits.
help	Does not give much in the way of instructions, but does give the url of this web page.

command	bits used	purpose
hm lvl1 Ndelay	hmbit[0-3]	adjusts the assumed level-1 delay to Ndelay beam clock ticks (from 33 to 47)
--	hmbit[4]	not used
hm prepost bitval	hmbit[5]	sets the separation between pre and post samples (in the amu cells) to either 1 (bitval=0) or 2 (bitval=1) beam clock ticks.
hm phase iphase	hmbit[6-7]	level-1 phase adjust (1/4 beam clock units) iphase ranges from 0 to 3. Change is -iphase*(1/4).
hm test itest	hmbit[8]	when itest is 1, all data packets contain data values of 1, 2, 3, ... Setting it to zero (normal running) turns this test mode off.
hm ren onoff	hmbit[9]	onoff=1 means enable internal preamp resets. In normal running, this should be zero -- the preamp resets come from the externally driven mode bits.
--	hmbit[10-11]	these bits are used to set the number of bits used to digitize the ADCs. Because the MVD does not expect to ever use anything but 10 bits, no command was written to change these bits. They should always be hmbit[10]=1, [11]=0.
hm raw onoff	hmbit[12]	onoff=1 Set "raw" mode (2 packets per event), =0 correlator mode, normal running setting This command also sets the related amu serial string to the correct values.
hm calen onoff	hmbit[13]	Normally this bit is 0. When set to 1, the calibration mode is enabled.
hm renfreq ifreq	hmbit[14-15]	ifreq is from 0 to 3, controls internal preamp reset frequency if iren=1. =0 means highest reset frequency, =3 means lowest reset frequency