Thresh DAC for TGV's

In each case, I have checked that the Threshold DAC responds to the serial string bits for the correct TGV chip. I have found an overall offset of one bit which occurs between the heap manager and the TGV serial string bits. It appears that the heap manager only captures 15 bits instead of the 16 bits it should take out of the input string. I do not fully understand the origin of this offset, but all of the tests below are with this offset included. If everything works with the exception of this one bit offset, I have marked that set of bits as "working".

Only 6 of the 8 TGV32/discriminator positions on the PC/MCM board have a chip installed.

These tests were done when there still seemed to be an offset of one bit in the serial string. In order to test the DAC itself, the DAC values listed below are based on my understanding of this offset -- they are not what I actually setup in the pcb/mcm program. Specifically, the 5 least significant bits in the pcb/mcm program are actually the 5 most significant bits in the DAC (shift up by one bit) and the MSB in the next DAC (VMID) in the pcb/mcm program is actually the LSB of this DAC. The DAC has 6 bits.

This can be monitored at ITHRSH (pin 101) on the TGV. This DAC does not seem to give a very linear output. However, it is consistent with numbers shown in the only documentation of this DAC's performance I found. Those three points are shown as squares on this plot. Note that the square for the DAC setting = 63 falls on top of the measured data point (at 0.00V).

Although this nonlinear behavior looks bad, it is probably good and may even be by design. As shown in a study of the discriminator performance, higher values of this DAC correspond to the most sensitive (i.e. lowest) discriminator settings. So, this DAC gives us extra sensitivity for lower discriminator settings at the expense of less flexibility for higher thresholds.

Threshold DAC in TGV 1