A meeting was held at Oak Ridge National lab on Thursday, May 16, 1996 to discuss the integration of the muon tracker electronics with the mechanical structures at station 2. Present were Ken Read, Glenn Young, John Halliwell, Ed Kennedy, Jim Walker, Alan Wintenberg, Walt Sondheim, and Dave Lee. A number of issues were discussed concerning the space restrictions imposed at station 2, possible mounting structures at station 2, present state of the electronic developments with ADC's and AMU's and the impact of the CSC electronics, and limitations imposed by the present understanding of the DSP/DCM's.
PROPOSED ACTION: LANL will incorporate the lengthened tie bars and electronics in its mechanical drawings.
clock | #bits | time | samples |
---|---|---|---|
100Mhz | 11 | 10.2us | 3 |
144Mhz | 11 | 7.1us | 5 |
100Mhz | 12 | 20.4us | 1 |
144Mhz | 12 | 14.2us | 2 |
An 11 bit ADC exists at ORNL but not a 12 bit. A 12 bit ADC requires development. The anticipated ADC/AMU combination will be 32 channels. The possibility of adding two (or more) ADC's per channel also requires development because the AMU can't handle multiple ADC's.
(16000 channels/140 links ) x 5 samples x (1/40 Mhz) = 14.3 us
A transmission rate of 20 Mhz would be adequate.
PROPOSED ACTION: 11 bit ADC/AMU with 5 samples
The grouping of fine cathodes on each mother board was discussed at length. The "no phi grouping" original request creates serious problems in board layout and cost so we agreed to propose of dispensing with that requirement and allow any grouping of fine cathodes that would be cost effective. The grouping that was most appealing was the three cathodes would be read out on the same motherboard. The number of channels per motherboard would be decided by cost and transmission rate. It was felt that board dimensions would be in units of sixteen channels and the most logical segmentation would be 96, 144 or 196 ( the count used in the WBS). For the 144 channel solution and 5 samples this corresponds to 720 words and for 196 this corresponds to 960 words. The 144 channel solution would work with 20 Mhz transmission rate, the 196 would not.
PROPOSED ACTION: No limitations on the grouping of fine cathodes.
The motherboard /daughterboard concept was discussed. Walt and Dave questioned and Ken, Alan, and Jim emphasized modularity, testing, and replacement. The results centered on the difference between connectors and cables as opposed to board to board connectors. Board to board connectors similar to the connectors on VME crates were felt by ORNL to be very reliable and not prone to the same problems that exists with ribbon cables and connectors. In addition the mother/daughter combination is appealing for its modularity where each individual major component can be tested separately and replaced if necessary without resorting to replacement of the whole mother board. The arguments for the mother/daughter concept were persuasive and the use of board to board connectors with no cables was believed to be sound. Cost was not thought to be an issue. The daughter boards could be simply the front end preamps and ADC/AMU. The links and heap manager could be other daughter boards.
PROPOSED ACTION: No cable interconnects between mother and daughter boards, board to board connectors are O.K. Mother/daughter concept preferred.
The anode readout (and low resolution cathode readout) is only 1 bit per channel and is widely spaced. Having a bus to readout all the anodes will be limited by the maximum buss speed of about 10 Mhz. To preserve the pipe line nature of the system a 16 channel FEE card would form a sixteen bit word with each bit corresponding to the individual channel latch and the output would be a ribbon cable routed to a central motherboard at the outer circumference of the octant. The amplifier cards would be along each spoke. All anodes in an octant would be readout by one motherboard. For station 3 this would amount to 66 words of 16 bit data per octant (also 66 ribbon cables of varying length from bottom to top!!). More than one octant could be readout by one mother board to more effectively utilize the fiber link if the routing comes to a common point for adjacent octants. No action was taken on the anode readout other than to establish that the anode FEE would be along the spoke. More thought is required.
The low resolution cathodes are also sparse and could be readout by the fine cathode mother board. The overhead in the number of words added to the fine cathode data stream is very small. A separate low resolution daughter board would be used but otherwise the motherboard would not be changed. Since there are fast clocks already on the motherboard and fine cathode daughter boards it was felt that the addition of a few latches would not effect the fine cathode noise. We all agreed that this would be a good approach.
PROPOSED ACTION: Try to incorporate the low resolution cathodes onto the high resolution motherboard.