How to download Xilinx FPGAs


How to download FPGA software to Xilinx FPGAs:
  • Open Xilinx ISE Project Navigator
  • Under Open menu, "Open Project" that you are interested in downloading to the FPGAs.
  • If you need to recompile the code, Under Process View (left-hand side of GUI) double-click Generate PROM, ACE or JTAG file. If this compilation stage ends successfully, the final message you will see is “//*** BATCH CMD : quit” in the message window. If the code has already been compiled you will see a green check-mark above the Generate Prom line.
  • To download to FPGA (actually PROM): Double click Configure Device (impact)
  • Right-click on xcf02s untitled.mcs (or other appropriate device - the device associated with the project should have Untitled.mcs under it, others should have "BYPASS" under them) and select Program from the menu
  • Click OK
  • If programming succeeds, you will see “Programming Succeeded” message. If it doesn’t succeed, you probably just have to repeat this process and program again (it does occasionally fail). If programming continues to fail, check that the JTAG cable is plugged in well and in the proper direction.
  • Close window. You do not need to save anything when it asks you if you want to save.


Building a Block:
  • Select the block that you wish to rebuild in ISE
  • On Synthesize, right-click and select Properties-->Xilinx Specific Options-->uncheck Add I/O Buffers
  • Under Implement Design-->Properties-->Map Properties-->uncheck Trim Unconnectd Signals
  • Select the Block to build and modify your block
  • Make rpm file:
    • Under Implement Design-->Place&Route-->View/Edit Placed Design
    • In new window: Floorplan-->Replace all with Placement
    • File-->Write RPM to UCF: Output UCF file: block_name_const, check "automatically generate" then Input Source Netlist = block_name.ngc, Output RPM = block_name_rpm.ngc. Click "ok"
  • Cleanup Project files
  • Change Properties back under Synthesize and Implement Design
  • Select your top-level project file and rebuild

If Code has been moved from one directory to another: If an FPGA code package has been moved from one directory to another (if copying from one computer to another, for instance), then you will typically get an error in the build. There is probably a way to change the path that is pointed to, but directly editing the project .ipf file to make the paths included in it point to the new area will fix the problem.



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