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Expedition PCB - Pinnacle - Version PCB2004_040223.1326 2004
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Job Directory:        C:\02_job_tom\MRM_SVIM\PCB\

Design Status Report: C:\02_job_tom\MRM_SVIM\PCB\LogFiles\DesignStatus_15.txt

Tue Oct 24 16:07:36 2006

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DESIGN STATUS
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Board Size Extents  ............ 6.3 X 7.69 (in)
Route Border Extents  .......... 6.25 X 7.64 (in)
Actual Board Area  ............. 48.42 (in)
Actual Route Area  ............. 47.72 (in)

Placement Areas: Name            Available         Required          Required/Available
                 Entire Board    96.83 Sq. (in)    89.08 Sq. (in)    91.99 %
           Room:                 57.35 Sq. (in)    0 Sq. (in)        0.00 %

Pins  .......................... 5598
Pins per Route Area  ........... 117.31 Pins/Sq. (in)

Layers  ........................ 16
    Layer 1 is a signal layer
        Trace Widths  .......... 4, 5, 6, 8, 10, 15
    Layer 2 is a Positive Plane Layer with nets
        GND
        Trace Widths  .......... None.
    Layer 3 is a signal layer
        Trace Widths  .......... 5
    Layer 4 is a Positive Plane Layer with nets
        +1.5V
        Trace Widths  .......... None.
    Layer 5 is a signal layer
        Trace Widths  .......... None.
    Layer 6 is a signal layer
        Trace Widths  .......... None.
    Layer 7 is a Positive Plane Layer with nets
        GND
        Trace Widths  .......... None.
    Layer 8 is a signal layer
        Trace Widths  .......... None.
    Layer 9 is a signal layer
        Trace Widths  .......... None.
    Layer 10 is a Positive Plane Layer with nets
        GND
        Trace Widths  .......... None.
    Layer 11 is a signal layer
        Trace Widths  .......... None.
    Layer 12 is a signal layer
        Trace Widths  .......... None.
    Layer 13 is a Positive Plane Layer with nets
        +2.5V
        Trace Widths  .......... None.
    Layer 14 is a signal layer
        Trace Widths  .......... 5
    Layer 15 is a Positive Plane Layer with nets
        GND
        Trace Widths  .......... None.
    Layer 16 is a signal layer
        Trace Widths  .......... 5, 6, 8, 10, 15

Nets  .......................... 1006
Connections  ................... 3546
Open Connections  .............. 2283
Differential Pairs  ............ 0
Percent Routed  ................ 35.67 %

Netline Length  ................ 2,873.03 (in)
Netline Manhattan Length  ...... 3,310.78 (in)
Total Trace Length  ............ 284.16 (in)

Trace Widths Used (th)  ........ 4, 5, 6, 8, 10, 15
Vias  .......................... 3255
Via Span  Name                   Quantity
   1-16   025VIA                 1560
          020VIA_10              973
   1-8    025VIA                 350
   9-16   025VIA                 372

Teardrops....................... 0
Breakouts....................... 0

Virtual Pins.................... 0
Guide Pins ..................... 0

Parts Placed  .................. 515
    Parts Mounted on Top  ...... 185
        SMD  ................... 139
        Through  ............... 6
        Test Points  ........... 40
        Mechanical  ............ 0
    Parts Mounted on Bottom  ... 330
        SMD  ................... 311
        Through  ............... 0
        Test Points  ........... 19
        Mechanical  ............ 0
    Edge Connector Parts  ...... 0

Parts not Placed  .............. 293

Nested Cells  .................. 0

Jumpers  ....................... 0

Through Holes  ................. 2926
    Holes per Board Area  ...... 60.43 Holes/Sq. (in)