======================================================================= Expedition PCB - Pinnacle - Version PCB2004_040223.1326 2004 ======================================================================= Job Directory: C:\02_job_tom\MRM_SVIM\PCB\ Design Status Report: C:\02_job_tom\MRM_SVIM\PCB\LogFiles\DesignStatus_11.txt Tue Oct 10 13:18:42 2006 ======================================================================= DESIGN STATUS ======================================================================= Board Size Extents ............ 6.3 X 7.68 (in) Route Border Extents .......... 6.25 X 7.62 (in) Actual Board Area ............. 48.38 (in) Actual Route Area ............. 47.31 (in) Placement Areas: Name Available Required Required/Available Entire Board 96.77 Sq. (in) 89.08 Sq. (in) 92.05 % Room: 57.35 Sq. (in) 0 Sq. (in) 0.00 % Pins .......................... 5594 Pins per Route Area ........... 118.24 Pins/Sq. (in) Layers ........................ 16 Layer 1 is a signal layer Trace Widths .......... 4, 6, 8, 10 Layer 2 is a signal layer Trace Widths .......... None. Layer 3 is a signal layer Trace Widths .......... None. Layer 4 is a Positive Plane Layer with nets GND Trace Widths .......... None. Layer 5 is a signal layer Trace Widths .......... None. Layer 6 is a signal layer Trace Widths .......... None. Layer 7 is a signal layer Trace Widths .......... None. Layer 8 is a signal layer Trace Widths .......... None. Layer 9 is a signal layer Trace Widths .......... None. Layer 10 is a signal layer Trace Widths .......... None. Layer 11 is a Positive Plane Layer with nets GND Trace Widths .......... None. Layer 12 is a signal layer Trace Widths .......... None. Layer 13 is a signal layer Trace Widths .......... None. Layer 14 is a signal layer Trace Widths .......... None. Layer 15 is a signal layer Trace Widths .......... None. Layer 16 is a signal layer Trace Widths .......... 5, 6, 8, 10 Nets .......................... 1008 Connections ................... 3324 Open Connections .............. 2628 Differential Pairs ............ 0 Percent Routed ................ 20.94 % Netline Length ................ 2,923.35 (in) Netline Manhattan Length ...... 3,369.91 (in) Total Trace Length ............ 153.89 (in) Trace Widths Used (th) ........ 4, 5, 6, 8, 10 Vias .......................... 2201 Via Span Name Quantity 1-16 025VIA 928 020VIA_10 973 1-8 025VIA 292 9-16 025VIA 8 Teardrops....................... 0 Breakouts....................... 0 Virtual Pins.................... 0 Guide Pins ..................... 0 Parts Placed .................. 412 Parts Mounted on Top ...... 170 SMD ................... 124 Through ............... 6 Test Points ........... 40 Mechanical ............ 0 Parts Mounted on Bottom ... 242 SMD ................... 223 Through ............... 0 Test Points ........... 19 Mechanical ............ 0 Edge Connector Parts ...... 0 Parts not Placed .............. 394 Nested Cells .................. 0 Jumpers ....................... 0 Through Holes ................. 2294 Holes per Board Area ...... 47.41 Holes/Sq. (in)