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Expedition PCB - Pinnacle - Version EXP2005.3_070529.00 2005.3
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Job Directory:        C:\02_job_tom\01_in_progress\126Y-267961_FVTX_FEM_PROTO_NEW_ REFDES\PCB\

Design Status Report: C:\02_job_tom\01_in_progress\126Y-267961_FVTX_FEM_PROTO_NEW_ REFDES\PCB\LogFiles\DesignStatus_00.txt

Mon Nov 23 09:20:44 2009

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DESIGN STATUS
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Board Size Extents  ............ 6.3 X 9.19 (in)
Route Border Extents  .......... 6.24 X 9.13 (in)
Actual Board Area  ............. 57.87 (in)
Actual Route Area  ............. 56.95 (in)

Placement Areas: Name            Available         Required          Required/Available
                 Entire Board    115.75 Sq. (in)   20.11 Sq. (in)    17.38 %
           Room:                 57.35 Sq. (in)    0 Sq. (in)        0.00 %

Pins  .......................... 5008
Pins per Route Area  ........... 87.94 Pins/Sq. (in)

Layers  ........................ 14
    Layer 1 is a signal layer
        Trace Widths  .......... 6, 7.87, 7.87, 8, 10, 15, 20, 25
    Layer 2 is a Positive Plane Layer with nets
        DGND
        Trace Widths  .......... None.
    Layer 3 is a signal layer
        Trace Widths  .......... 3.5, 5, 12, 25
    Layer 4 is a Positive Plane Layer with nets
        +1.2V
        Trace Widths  .......... None.
    Layer 5 is a signal layer
        Trace Widths  .......... 5
    Layer 6 is a Positive Plane Layer with nets
        DGND
        Trace Widths  .......... None.
    Layer 7 is a signal layer
        Trace Widths  .......... 6
    Layer 8 is a signal layer
        Trace Widths  .......... 5, 6
    Layer 9 is a Positive Plane Layer with nets
        +2.5V-D
        +5V
        Trace Widths  .......... None.
    Layer 10 is a signal layer
        Trace Widths  .......... 5, 20
    Layer 11 is a Positive Plane Layer with nets
        +3.3V-D
        Trace Widths  .......... None.
    Layer 12 is a signal layer
        Trace Widths  .......... 3.5, 5
    Layer 13 is a Positive Plane Layer with nets
        DGND
        Trace Widths  .......... None.
    Layer 14 is a signal layer
        Trace Widths  .......... 6, 8, 10, 15, 20, 25

Nets  .......................... 769
Connections  ................... 3576
Open Connections  .............. 0
Differential Pairs  ............ 35
Differential Pair Names:   BCO_0n   BCO_0p
                           BCO_1n   BCO_1p
                           BCO_2n   BCO_2p
                           BCO_3n   BCO_3p
                           CLK80n   CLK80p
                           Clk80_0n   Clk80_0p
                           Clk80_1n   Clk80_1p
                           Clk80_2n   Clk80_2p
                           Clk80_3n   Clk80_3p
                           CLK105n   CLK105p
                           Clk105_0n   Clk105_0p
                           Clk105_1n   Clk105_1p
                           Clk105_2n   Clk105_2p
                           Clk105_3n   Clk105_3p
                           DCM_TXn   DCM_TXp
                           DOUT_0n   DOUT_0p
                           DOUT_1n   DOUT_1p
                           DOUT_2n   DOUT_2p
                           DOUT_3n   DOUT_3p
                           DOUT_4n   DOUT_4p
                           DOUT_5n   DOUT_5p
                           DOUT_6n   DOUT_6p
                           DOUT_7n   DOUT_7p
                           DOUT_8n   DOUT_8p
                           DOUT_9n   DOUT_9p
                           DOUT_10n   DOUT_10p
                           DOUT_11n   DOUT_11p
                           DOUT_12n   DOUT_12p
                           DOUT_13n   DOUT_13p
                           DOUT_14n   DOUT_14p
                           DOUT_15n   DOUT_15p
                           SC_INn   SC_INp
                           SC_OUTn   SC_OUTp
                           VME_BG0INn   VME_BG0OUTn
                           VME_BG1INn   VME_BG1OUTn
                           
Percent Routed  ................ 100.00 %

Netline Length  ................ 108.69 (in)
Netline Manhattan Length  ...... 137.46 (in)
Total Trace Length  ............ 2,025.31 (in)

Trace Widths Used (th)  ........ 3.5, 5, 6, 7.87, 7.87, 8, 10, 12, 15, 20, 25
Vias  .......................... 3633
Via Span  Name                   Quantity
   1-14   035VIA                 74
          025VIA                 1388
          018VIA_8_14mask-bga    779
          018VIA_8               1392

Teardrops....................... 0
Breakouts....................... 0

Virtual Pins.................... 0
Guide Pins ..................... 0

Parts Placed  .................. 646
    Parts Mounted on Top  ...... 340
        SMD  ................... 318
        Through  ............... 22
        Test Points  ........... 0
        Mechanical  ............ 0
    Parts Mounted on Bottom  ... 306
        SMD  ................... 306
        Through  ............... 0
        Test Points  ........... 0
        Mechanical  ............ 0
    Embedded Components ........ 0
        Capacitors ............. 0
        Resistors .............. 0
    Edge Connector Parts  ...... 0

Parts not Placed  .............. 0

Nested Cells  .................. 0

Jumpers  ....................... 0

Through Holes  ................. 3846
    Holes per Board Area  ...... 66.45 Holes/Sq. (in)
Mounting Holes  ................ 40