PLANES PROCESSOR ---------------- 12:21 AM Wednesday, October 15, 2008 Job Name: C:\01_JOB_STACY\126y-267912_26SEPT08\PCB\126y-267912.pcb POSITIVE PLANE LAYER : 1 Plane Shapes Found On This Layer : 1 Plane Holes Found On This Layer : 32 PLANE NET : GND_DIG-1 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : YES Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 5th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Number Tie Legs : BURIED Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1505 Total Thru Pads Of This Net : 21 Total SMD Pads Of This Net : 1171 Plane Created : Layer 1 - Net GND_DIG-1 Via Pads In This Plane : 858 Thru Pads In This Plane : 21 SMD Pads In This Plane : 523 Pads To Be Buried In Plane : 1381 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 21 POSITIVE PLANE LAYER : 2 Plane Shapes Found On This Layer : 3 Plane Holes Found On This Layer : 0 PLANE NET : GND_DIG-1 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Number Tie Legs : BURIED Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1505 Total Thru Pads Of This Net : 21 Total SMD Pads Of This Net : 0 Plane Created : Layer 2 - Net GND_DIG-1 Via Pads In This Plane : 1504 Thru Pads In This Plane : 21 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 1504 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 21 PLANE NET : XSIG200060 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 5th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 0 Total Thru Pads Of This Net : 8 Total SMD Pads Of This Net : 0 Plane Created : Layer 2 - Net XSIG200060 Via Pads In This Plane : 0 Thru Pads In This Plane : 8 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 7 Pads With 3/4 Tie Connections : 1 Pads With 3 Tie Legs : 1 Coordinates (th) : 1) X=262.07 Y=-2,667.06 Pin: J31-5 PLANE NET : XSIG200054 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 5th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : NO Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 0 Total Thru Pads Of This Net : 8 Total SMD Pads Of This Net : 0 Plane Created : Layer 2 - Net XSIG200054 Via Pads In This Plane : 0 Thru Pads In This Plane : 8 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 6 Pads With 3/4 Tie Connections : 2 Pads With 3 Tie Legs : 2 Coordinates (th) : 1) X=-10,059.39 Y=-6,605.02 Pin: J36-5 2) X=421.93 Y=-2,421.94 Pin: J25-3 POSITIVE PLANE LAYER : 4 Plane Shapes Found On This Layer : 30 Plane Holes Found On This Layer : 0 PLANE NET : VDDD_10-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net VDDD_10-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 2 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : VDDD_6-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net VDDD_6-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 2 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : VDDD_2-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net VDDD_2-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 2 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : XSIG180208 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG180208 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 1 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 1 PLANE NET : XSIG180216 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG180216 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 1 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 1 PLANE NET : VDDD_10-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net VDDD_10-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 2 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : VDDD_6-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net VDDD_6-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 2 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : VDDD_2-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net VDDD_2-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 2 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : VDDA_10-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net VDDA_10-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 2 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : VDDA_6-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net VDDA_6-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 2 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : VDDA_2-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Number Tie Legs : BURIED Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net VDDA_2-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 2 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : XSIG160219 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG160219 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 1 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 1 PLANE NET : XSIG160191 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG160191 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 1 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 1 PLANE NET : XSIG160187 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG160187 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 1 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 1 PLANE NET : XSIG170212 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG170212 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 1 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 1 PLANE NET : XSIG170208 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG170208 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 1 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 1 PLANE NET : XSIG170204 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG170204 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 1 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 1 PLANE NET : VDDA_10-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net VDDA_10-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 2 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : VDDA_6-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net VDDA_6-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 2 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : VDDA_2-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Number Tie Legs : BURIED Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net VDDA_2-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 2 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : XSIG190214 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG190214 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 1 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 1 PLANE NET : XSIG190210 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG190210 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 1 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 1 PLANE NET : XSIG190206 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG190206 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 1 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 1 PLANE NET : +3.3V_D_FO Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : YES Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 56 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net +3.3V_D_FO Via Pads In This Plane : 56 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 56 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 1 PLANE NET : XSIG150245 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 0 Total Thru Pads Of This Net : 2 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG150245 Via Pads In This Plane : 0 Thru Pads In This Plane : 2 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG200049 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 0 Total Thru Pads Of This Net : 2 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG200049 Via Pads In This Plane : 0 Thru Pads In This Plane : 2 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG220233 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 6th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 5th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : NO Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 0 Total Thru Pads Of This Net : 2 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG220233 Via Pads In This Plane : 0 Thru Pads In This Plane : 2 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG220232 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 6th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 0 Total Thru Pads Of This Net : 2 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG220232 Via Pads In This Plane : 0 Thru Pads In This Plane : 2 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG210265 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 6th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 5th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : NO Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 0 Total Thru Pads Of This Net : 2 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG210265 Via Pads In This Plane : 0 Thru Pads In This Plane : 2 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG150247 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 6th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 0 Total Thru Pads Of This Net : 2 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG150247 Via Pads In This Plane : 0 Thru Pads In This Plane : 2 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180212 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 20th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 4 - Net XSIG180212 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 1 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 1 POSITIVE PLANE LAYER : 6 Plane Shapes Found On This Layer : 2 Plane Holes Found On This Layer : 0 PLANE NET : GND_ALG-1 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 12th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 41 Total Thru Pads Of This Net : 11 Total SMD Pads Of This Net : 0 Plane Created : Layer 6 - Net GND_ALG-1 Via Pads In This Plane : 36 Thru Pads In This Plane : 11 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 47 PLANE NET : GND_ALG-2 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 12th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 43 Total Thru Pads Of This Net : 11 Total SMD Pads Of This Net : 0 Plane Created : Layer 6 - Net GND_ALG-2 Via Pads In This Plane : 43 Thru Pads In This Plane : 11 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 54 POSITIVE PLANE LAYER : 8 Plane Shapes Found On This Layer : 34 Plane Holes Found On This Layer : 0 PLANE NET : VDDD_8-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net VDDD_8-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDD_4-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net VDDD_4-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : V3.3D-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net V3.3D-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180214 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG180214 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180210 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG180210 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180228 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG180228 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDD_8-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net VDDD_8-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDD_4-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net VDDD_4-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : V3.3D-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net V3.3D-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDA_8-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net VDDA_8-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDA_4-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net VDDA_4-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : V3.3A-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net V3.3A-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160193 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG160193 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160189 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG160189 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160245 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG160245 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170210 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG170210 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170206 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG170206 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170224 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG170224 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDA_8-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : YES Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net VDDA_8-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDA_4-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net VDDA_4-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : V3.3A-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net V3.3A-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190212 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG190212 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190208 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG190208 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190226 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG190226 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG100245 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 10 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG100245 Via Pads In This Plane : 10 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 10 PLANE NET : XSIG100264 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 10 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG100264 Via Pads In This Plane : 10 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 10 PLANE NET : PLSA Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 13 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net PLSA Via Pads In This Plane : 13 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 12 Pads With 3/4 Tie Connections : 1 Pads With 3 Tie Legs : 1 Coordinates (th) : 1) X=-484.87 Y=2,306.44 Via PLANE NET : PLSB Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 14 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net PLSB Via Pads In This Plane : 14 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 14 PLANE NET : XSIG230231 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : YES Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : NO Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 0 Total Thru Pads Of This Net : 2 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG230231 Via Pads In This Plane : 0 Thru Pads In This Plane : 2 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG230230 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 5th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 8th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 8th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 8th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : NO Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 0 Total Thru Pads Of This Net : 2 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG230230 Via Pads In This Plane : 0 Thru Pads In This Plane : 2 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG150246 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 0 Total Thru Pads Of This Net : 2 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG150246 Via Pads In This Plane : 0 Thru Pads In This Plane : 2 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG210267 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 6th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : NO Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 0 Total Thru Pads Of This Net : 2 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG210267 Via Pads In This Plane : 0 Thru Pads In This Plane : 2 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG210266 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 5th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 8th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 8th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 8th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : NO Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 0 Total Thru Pads Of This Net : 2 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net XSIG210266 Via Pads In This Plane : 0 Thru Pads In This Plane : 2 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : GND_DIG-1 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 6th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 5th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 8th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 8th Thermal Clearance : 6th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1513 Total Thru Pads Of This Net : 21 Total SMD Pads Of This Net : 0 Plane Created : Layer 8 - Net GND_DIG-1 Via Pads In This Plane : 1496 Thru Pads In This Plane : 21 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 1496 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 21 POSITIVE PLANE LAYER : 9 Plane Shapes Found On This Layer : 31 Plane Holes Found On This Layer : 21 PLANE NET : GND_DIG-1 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 12th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1272 Total Thru Pads Of This Net : 21 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net GND_DIG-1 Via Pads In This Plane : 1224 Thru Pads In This Plane : 17 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 1219 Pads With 3/4 Tie Connections : 18 Pads With 2/4 Tie Connections : 4 Pads With 3 Tie Legs : 18 Coordinates (th) : 1) X=-10,711.44 Y=688.67 Via 2) X=-10,708.05 Y=943.23 Via 3) X=-10,705.23 Y=-725.49 Via 4) X=-10,694.82 Y=-774.49 Via 5) X=-7,697.73 Y=3,175.5 Via 6) X=-7,667.8 Y=1,342.88 Via 7) X=-7,102.45 Y=-3,312.45 Via 8) X=-6,951.21 Y=3,154.25 Via 9) X=-6,562.83 Y=3,634.76 Via 10) X=-6,131.84 Y=-1,594.75 Via 11) X=-6,009.51 Y=-1,754.88 Via 12) X=-5,351.5 Y=3,306.19 Via 13) X=-5,189.42 Y=4,560.01 Via 14) X=-3,951.84 Y=-1,584.75 Via 15) X=-3,516.97 Y=3,633 Via 16) X=-2,158.46 Y=3,140.07 Via 17) X=-2,064.06 Y=3,207.37 Via 18) X=-1,904.06 Y=3,207.37 Via Pads With 2 Tie Legs : 4 Coordinates (th) : 1) X=-10,564.29 Y=1,739.02 Pin: U62-21 2) X=-7,102.45 Y=-3,352.45 Via 3) X=-7,086.77 Y=3,314.02 Via 4) X=-2,013.62 Y=1,513.55 Via PLANE NET : XSIG190223 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG190223 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190221 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG190221 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190220 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG190220 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190218 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG190218 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190216 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG190216 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190227 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG190227 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180225 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG180225 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180223 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG180223 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180222 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG180222 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180220 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG180220 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180218 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG180218 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180229 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG180229 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160230 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG160230 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160228 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG160228 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160226 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG160226 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160224 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG160224 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160222 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG160222 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160246 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG160246 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170221 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG170221 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170219 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG170219 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170218 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG170218 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170216 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG170216 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170214 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG170214 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170225 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG170225 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG220231 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG220231 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG220230 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG220230 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG210142 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG210142 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG150164 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG150164 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG210252 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG210252 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG200057 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 0 Total Thru Pads Of This Net : 2 Total SMD Pads Of This Net : 0 Plane Created : Layer 9 - Net XSIG200057 Via Pads In This Plane : 0 Thru Pads In This Plane : 2 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 POSITIVE PLANE LAYER : 11 Plane Shapes Found On This Layer : 33 Plane Holes Found On This Layer : 0 PLANE NET : +5V-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 26 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net +5V-A Via Pads In This Plane : 26 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 26 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : +5V-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 28 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net +5V-B Via Pads In This Plane : 28 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 28 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : +5V_REF Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net +5V_REF Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 2 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : +1.5V_D_A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 61 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net +1.5V_D_A Via Pads In This Plane : 61 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 61 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : +1.5V_D_B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 62 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net +1.5V_D_B Via Pads In This Plane : 62 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 62 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : +1.5V_D_C Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 61 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net +1.5V_D_C Via Pads In This Plane : 61 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 61 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : +1.5V_D_D Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 61 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net +1.5V_D_D Via Pads In This Plane : 61 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 61 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : +1.5V_D_JTAG Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 15 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net +1.5V_D_JTAG Via Pads In This Plane : 15 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 15 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : +1.5V_D_SC Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 61 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net +1.5V_D_SC Via Pads In This Plane : 61 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 61 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : VDDA_9-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net VDDA_9-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDA_5-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net VDDA_5-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190213 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net XSIG190213 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190209 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net XSIG190209 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190205 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net XSIG190205 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDA_1-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net VDDA_1-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDD_9-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net VDDD_9-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDD_5-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net VDDD_5-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDD_1-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net VDDD_1-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDD_9-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net VDDD_9-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDD_5-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net VDDD_5-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDD_1-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net VDDD_1-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDA_9-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net VDDA_9-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDA_5-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net VDDA_5-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDA_1-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net VDDA_1-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180215 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net XSIG180215 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180211 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net XSIG180211 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180207 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net XSIG180207 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160194 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net XSIG160194 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160190 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net XSIG160190 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160184 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net XSIG160184 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170211 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net XSIG170211 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170207 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net XSIG170207 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170203 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 11 - Net XSIG170203 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 POSITIVE PLANE LAYER : 13 Plane Shapes Found On This Layer : 25 Plane Holes Found On This Layer : 16 PLANE NET : GND_DIG-1 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : YES Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 12th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1272 Total Thru Pads Of This Net : 21 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net GND_DIG-1 Via Pads In This Plane : 1174 Thru Pads In This Plane : 21 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 1173 Pads With 3/4 Tie Connections : 21 Pads With 2/4 Tie Connections : 1 Pads With 3 Tie Legs : 21 Coordinates (th) : 1) X=-7,697.73 Y=3,175.5 Via 2) X=-7,667.8 Y=1,342.88 Via 3) X=-7,102.45 Y=-3,432.45 Via 4) X=-7,062.45 Y=-3,432.45 Via 5) X=-7,022.45 Y=-3,432.45 Via 6) X=-6,982.45 Y=-3,432.45 Via 7) X=-6,951.21 Y=3,154.25 Via 8) X=-6,942.45 Y=-3,432.45 Via 9) X=-6,131.84 Y=-1,594.75 Via 10) X=-6,131.69 Y=-3,437.91 Via 11) X=-6,037.45 Y=-3,432.45 Via 12) X=-6,009.51 Y=-1,754.88 Via 13) X=-5,997.45 Y=-3,432.45 Via 14) X=-5,957.45 Y=-3,432.45 Via 15) X=-5,917.45 Y=-3,432.45 Via 16) X=-5,877.45 Y=-3,432.45 Via 17) X=-4,866.84 Y=4,158.67 Via 18) X=-3,951.84 Y=-1,584.75 Via 19) X=-2,158.46 Y=3,140.07 Via 20) X=-2,064.06 Y=3,207.37 Via 21) X=-1,904.06 Y=3,207.37 Via Pads With 2 Tie Legs : 1 Coordinates (th) : 1) X=-2,013.62 Y=1,513.55 Via PLANE NET : XSIG190222 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG190222 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190224 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG190224 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190219 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG190219 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190217 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG190217 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190215 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG190215 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180224 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG180224 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180226 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG180226 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180221 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG180221 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180219 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG180219 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180217 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG180217 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160229 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG160229 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160232 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG160232 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160225 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG160225 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160223 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG160223 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160221 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG160221 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170220 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG170220 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170222 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG170222 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170217 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG170217 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170215 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG170215 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170213 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG170213 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG230172 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG230172 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG230208 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG230208 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG150195 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG150195 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG210251 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG210251 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG150225 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 13 - Net XSIG150225 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 POSITIVE PLANE LAYER : 15 Plane Shapes Found On This Layer : 22 Plane Holes Found On This Layer : 0 PLANE NET : +2.5V_D_A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 12th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 101 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net +2.5V_D_A Via Pads In This Plane : 101 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 101 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : +2.5V_D_B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 12th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 105 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net +2.5V_D_B Via Pads In This Plane : 104 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 104 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : +2.5V_D_C Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 12th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 100 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net +2.5V_D_C Via Pads In This Plane : 100 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 100 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : +2.5V_D_D Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 12th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 100 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net +2.5V_D_D Via Pads In This Plane : 100 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 100 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : +2.5V_D_JTAG Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 12th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 24 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net +2.5V_D_JTAG Via Pads In This Plane : 24 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 24 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 1 PLANE NET : +2.5V_D_SC Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 12th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 86 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net +2.5V_D_SC Via Pads In This Plane : 86 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads To Be Buried In Plane : 86 Unconnected To Plane : 0 Connected To Trace : 0 PLANE NET : VDDA_7-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net VDDA_7-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDA_3-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : YES Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net VDDA_3-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190211 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net XSIG190211 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG190207 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net XSIG190207 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDD_7-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net VDDD_7-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDA_7-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net VDDA_7-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDA_3-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net VDDA_3-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDD_3-B Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net VDDD_3-B Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDD_7-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net VDDD_7-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : VDDD_3-A Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 2 Total Thru Pads Of This Net : 0 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net VDDD_3-A Via Pads In This Plane : 2 Thru Pads In This Plane : 0 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180213 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net XSIG180213 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG180209 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net XSIG180209 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 1 Pads With 2/4 Tie Connections : 1 Pads With 2 Tie Legs : 1 Coordinates (th) : 1) X=-10,626.91 Y=-2,622.33 Pin: J26-9 PLANE NET : XSIG160192 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net XSIG160192 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG160188 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net XSIG160188 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170209 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net XSIG170209 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 PLANE NET : XSIG170205 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1 Total Thru Pads Of This Net : 1 Total SMD Pads Of This Net : 0 Plane Created : Layer 15 - Net XSIG170205 Via Pads In This Plane : 1 Thru Pads In This Plane : 1 SMD Pads In This Plane : 0 Pads With 4/4 Tie Connections : 2 POSITIVE PLANE LAYER : 16 Plane Shapes Found On This Layer : 1 Plane Holes Found On This Layer : 20 PLANE NET : GND_DIG-1 Total Plane Shapes For This Net : 1 Use Route Border As Plane Shape : NO Create Actual Plane Shapes : NO Regenerate APS Connections Only : NO Generate Plane Data : YES Plane To Plane Clearance : 10th Plane To Other Metal Clearance : 0th Mounting Hole / Contour Clearance : 10th Minimum Plane Gap Distance : NA Use TieLeg Bridges If Needed : NO Use Padstack Thermal Definition : NO Default Via Tie Properties Number Tie Legs : BURIED Default Thru Tie Properties Tie Leg Width : 10th Thermal Clearance : 4th Number Tie Legs : FOUR Tie Orientation : PREFER 0 Default SMD Tie Properties Number Tie Legs : BURIED Eliminate Untied Areas : YES Eliminate Single Tied Areas : NO Orthogonal Data Only : NO Discard Areas By Dimension : NO Default Hatch Width : 1th Default Hatch Distance : 1th Default Hatch Pattern : (|) Vertical Default Metal Percentage : 100.00 Total Via Pads Of This Net : 1272 Total Thru Pads Of This Net : 21 Total SMD Pads Of This Net : 617 Plane Created : Layer 16 - Net GND_DIG-1 Via Pads In This Plane : 1272 Thru Pads In This Plane : 21 SMD Pads In This Plane : 617 Pads To Be Buried In Plane : 1889 Unconnected To Plane : 0 Connected To Trace : 0 Pads With 4/4 Tie Connections : 21 12:22 AM Wednesday, October 15, 2008