Testbench Configuration

MOSAIC testbench with single chip using the Sr90 source.

MOSAIC testbench with single stave.

MOSAIC testbench with 3 MOSAIC board installed.

MOSAIC Power Unit communication setup.

Testbench Results

• Sr90 source test

• 20170810 initial look of the trigger delay time

• 20170817 chip test update

• 20170820 stave test initial look

• 20170823 chip test update with cosmic ray, Sr90 source with and without collimator

• 20170831 chip test udpate with Sr90 and new collimator

• 20170907 chip test with Sr90 and cosmic ray

• 20170918 chip test with Sr90 source with triggered events

• 20170921 chip test with Sr90 and cosmic ray with triggered events

• 20170928 test-bench update

• 20171012 trigger delay test and Power Unit setup

• 20171018 power unit setup and test

• 20171107 two layers of chips with the MOSAIC readout

• 20180104 ALPIDE chip trigger delay study status

Status and Plan

• 201707 status and plan

• 201709 status and plan

MOSAIC communication to the Power Board

• See instruction here