On 6-Aug-99 it was tested again with the latest Xilinx programs (mcmc6.hex and mcmr8.hex). This time, no problems were seen with the cal-injection. However, later tests, on 23-Aug-99, showed that this was a mistake. The 5th ADC chip is not working correctly. The 5th ADC chip always returns the ADC value from the last channel of the 4th chip. Since the 4th chip works, the 5th chip appears to work until the data are examined more carefully. From the spy channels, I can see that the preamp and the AMU work. So, the problem is probably in the ADC part of the AMU/ADC chip, in the connections of the control lines to it, or in the connections of the output line. The 3rd block of channels has lower gain than the others, but still works. Examination of the data file from the linearity/noise tests (mcm111_2.dat) made on 6-Aug-1999 showed that the same problem existed at that time, but was not noticed. This can be seen because all the data from the 5th chip is exactly the same as the data for the last channel of the 4th chip. I did not repeat the other parts of the tests.

One September 15, 1999 I retested this MCM. The results were the same -- 5th block of 32 ADC channels all give the same ADC value as the last channel of the 4th block. All MUX's work. Then, I took this MCM in and out of its box 100 times. Then I opened and closed the box 100 times without taking the MCM out of the box. Then I retested it, starting Sept 15 and finishing Sept 16. The results were the same as before.

Conclusion: 32 dead channels (5th block).