Notes about problems with MCM 102

MCM-102 was originally tested 8-Jul-99. It failed because "serial data lines don't work."

On 9-Aug-99, after getting Xilinx programs which we think work correctly, this MCM was retested. The results were the same -- the serial controls do not work.

The serial readback does not work. The Vfb DAC, which can be monitored at TP9, did not respond correctly to changes in the DAC setting. It changed, but not to the correct value. It appears that there is a 1 bit shift in the serial string bits. Changing bit 178 of the TGV serial string changes the measured voltage at TP9 -- which should be controlled by bits 179-184. This shift is not seen in the heap manager controls -- they seem to work correctly. The RAMP for AMU/ADC #1 was

  • not the right shape and
  • changed eratically from event-to-event.
    Some sample plots are in the logbook on pp 57-58.

    If the only problem was a 1 bit shift in the serial string, this MCM could be recovered at the expense of some extra effort in the Arcnet software (i.e. treat this one MCM differently than all the others) and the associated confusion which would result. However, the RAMP does not even do the same thing from one event to the next, so the problem seems greater than just a misaligned serial string.

    Aug-23-1999 tried testing this MCM again, after some surface-mount components had been replaced. Same result -- serial controls do not work. The serial data signal appears at TP-2 (first time out of Xilinx, into TGV's) but does not appear at TP-3 (2nd time out of Xilinx, into AMU/ADC's). None of the multiplexers work. It looks like the serial string in the TGV's does work, more or less. As described above, the Vfb DAC on chip 1 behaves as if there was a 1-bit shift. The CS_DIS bits (discriminator output disable) seem to work on all 8 TGV chips. It seems that the serial string goes through all TGVs. The AMU/ADCs all act as if they are not receiving the serial string. Since the serial data does not appear at TP3, it should be one of the following problems

  • internal fault in TGV#8 causes SD to be lost between input and output lines,
  • bad trace from SD_OUT on TGV8 to heap manager,
  • internal fault in heap manager xilinx chip,
  • bad trace from 2nd heap manager output to TP3.

    Conclusion: The serial controls for this MCM do not work. The MCM must be rejected.

    updated 23-Aug-1999
    John Sullivan (sullivan@lanl.gov)